45 (1 << 7) | (1 << 6) | ((21 - 17) << 2) | (0 << 0));
90 u8 int_pin = 0, int_line = 0;
98 case 1: int_line =
config->pirqa_routing;
break;
99 case 2: int_line =
config->pirqb_routing;
break;
100 case 3: int_line =
config->pirqc_routing;
break;
101 case 4: int_line =
config->pirqd_routing;
break;
120 reg32 |= (
config->gpi0_routing & 0x03) << 0;
121 reg32 |= (
config->gpi1_routing & 0x03) << 2;
122 reg32 |= (
config->gpi2_routing & 0x03) << 4;
123 reg32 |= (
config->gpi3_routing & 0x03) << 6;
124 reg32 |= (
config->gpi4_routing & 0x03) << 8;
125 reg32 |= (
config->gpi5_routing & 0x03) << 10;
126 reg32 |= (
config->gpi6_routing & 0x03) << 12;
127 reg32 |= (
config->gpi7_routing & 0x03) << 14;
128 reg32 |= (
config->gpi8_routing & 0x03) << 16;
129 reg32 |= (
config->gpi9_routing & 0x03) << 18;
130 reg32 |= (
config->gpi10_routing & 0x03) << 20;
131 reg32 |= (
config->gpi11_routing & 0x03) << 22;
132 reg32 |= (
config->gpi12_routing & 0x03) << 24;
133 reg32 |= (
config->gpi13_routing & 0x03) << 26;
134 reg32 |= (
config->gpi14_routing & 0x03) << 28;
135 reg32 |= (
config->gpi15_routing & 0x03) << 30;
173 state =
"state keep";
211 if (
config->c4onc3_enable)
217 if (
CONFIG(DEBUG_PERIODIC_SMI))
226 reg8 &= ~((7 << 3) | (7 << 0));
228 reg8 |= (5 << 3) | (3 << 0);
231 reg8 |= (0 << 3) | (1 << 0);
255 reg32 |= (
config->throttle_duty & 7) << 5;
310 reg32 |= (1 << 29) | (1 << 28);
312 reg32 |= (1 << 27) | (1 << 26) | (1 << 25) | (1 << 24);
319 reg32 |= (1 << 18) | (1 << 17);
322 reg32 |= (1 << 4) | (1 << 3) | (1 << 2) | (1 << 1);
381 if (
CONFIG(SMM_LEGACY_ASEG))
430 res->
base = 0xff800000;
431 res->
size = 0x00800000;
437 res->
size = 0x00001000;
477 static const struct pci_driver ich9_lpc
__pci_driver = {
unsigned long acpi_write_hpet(const struct device *device, unsigned long current, acpi_rsdp_t *rsdp)
static int acpi_is_wakeup_s3(void)
void setup_ioapic(void *ioapic_base, u8 ioapic_id)
void ioapic_lock_max_vectors(void *ioapic_base)
#define MAINBOARD_POWER_ON
#define MAINBOARD_POWER_OFF
#define MAINBOARD_POWER_KEEP
#define printk(level,...)
void outb(u8 val, u16 port)
void outl(u32 val, u16 port)
void outw(u16 val, u16 port)
DEVTREE_CONST struct device *DEVTREE_CONST all_devices
Linked list of ALL devices.
DEVTREE_CONST struct device * pcidev_on_root(uint8_t dev, uint8_t fn)
struct resource * new_resource(struct device *dev, unsigned int index)
See if a resource structure already exists for a given index and if not allocate one.
static struct tpm_chip chip
void i8259_configure_irq_trigger(int int_num, int is_level_triggered)
Configure IRQ triggering in the i8259 compatible Interrupt Controller.
#define LPC_IS_MOBILE(dev)
#define D31F0_C4TIMING_CNT
#define D31F0_CxSTATE_CNF
#define D31F0_SERIRQ_CNTL
#define D31F0_C5_EXIT_TIMING
#define APM_CNT_ACPI_DISABLE
#define APM_CNT_ACPI_ENABLE
static __always_inline void pci_or_config32(const struct device *dev, u16 reg, u32 ormask)
static __always_inline void pci_write_config32(const struct device *dev, u16 reg, u32 val)
static __always_inline void pci_update_config8(const struct device *dev, u16 reg, u8 mask, u8 or)
static __always_inline u16 pci_read_config16(const struct device *dev, u16 reg)
static __always_inline void pci_or_config8(const struct device *dev, u16 reg, u8 ormask)
static __always_inline u8 pci_read_config8(const struct device *dev, u16 reg)
static __always_inline void pci_write_config16(const struct device *dev, u16 reg, u16 val)
static __always_inline void pci_write_config8(const struct device *dev, u16 reg, u8 val)
#define BIOS_INFO
BIOS_INFO - Expected events.
#define BIOS_DEBUG
BIOS_DEBUG - Verbose output.
void cmos_init(bool invalid)
unsigned int get_uint_option(const char *name, const unsigned int fallback)
#define PCI_INTERRUPT_PIN
#define PCI_INTERRUPT_LINE
void pci_dev_enable_resources(struct device *dev)
void pci_dev_read_resources(struct device *dev)
struct pci_operations pci_dev_ops_pci
Default device operation for PCI devices.
void pci_dev_set_resources(struct device *dev)
#define PCI_DID_INTEL_82801IBM_LPC
#define PCI_DID_INTEL_82801IEM_LPC
#define PCI_DID_INTEL_82801IB_LPC
#define PCI_DID_INTEL_82801IO_LPC
#define PCI_DID_INTEL_82801IR_LPC
#define PCI_DID_INTEL_82801IH_LPC
void intel_acpi_pcie_hotplug_generator(u8 *hotplug_map, int port_number)
#define D31F0_GEN_PMCON_1
#define D31F0_GEN_PMCON_3
void intel_acpi_gen_def_acpi_pirq(const struct device *lpc)
#define IORESOURCE_SUBTRACTIVE
#define IORESOURCE_ASSIGNED
#define IOINDEX_SUBTRACTIVE(IDX, LINK)
void scan_static_bus(struct device *bus)
static int rtc_failed(uint32_t gen_pmcon_b)
static void enable_hpet(void)
static void i82801ix_enable_serial_irqs(struct device *dev)
static const char * lpc_acpi_name(const struct device *dev)
static void enable_clock_gating(void)
static struct device_operations device_ops
static void i82801ix_power_options(struct device *dev)
static void southbridge_fill_ssdt(const struct device *device)
static void i82801ix_lpc_read_resources(struct device *dev)
static void lpc_init(struct device *dev)
static const unsigned short pci_device_ids[]
static void i82801ix_enable_apic(struct device *dev)
static const struct pci_driver ich9_lpc __pci_driver
static void i82801ix_gpi_routing(struct device *dev)
static void i82801ix_rtc_init(struct device *dev)
static void i82801ix_pirq_init(struct device *dev)
static void i82801ix_set_acpi_mode(struct device *dev)
static void i82801ix_configure_cstates(struct device *dev)
void(* read_resources)(struct device *dev)
enum device_path_type type
DEVTREE_CONST struct device * next
DEVTREE_CONST void * chip_info