21 #include <soc/iomap.h>
22 #include <soc/southbridge.h>
24 #include <soc/amd_pci_int_defs.h>
25 #include <soc/pci_devs.h>
42 {
PIRQ_F,
"INTF#/GENINT2" },
132 if (
CONFIG(HAVE_SMI_HANDLER)) {
169 al2ahb_val =
read8((
void *)(al2ahb_base + AL2AHB_CONTROL_CLK_OFFSET));
170 al2ahb_val |= AL2AHB_CLK_GATE_EN;
171 write8((
void *)(al2ahb_base + AL2AHB_CONTROL_CLK_OFFSET), al2ahb_val);
172 al2ahb_val =
read8((
void *)(al2ahb_base + AL2AHB_CONTROL_HCLK_OFFSET));
173 al2ahb_val |= AL2AHB_HCLK_GATE_EN;
174 write8((
void *)(al2ahb_base + AL2AHB_CONTROL_HCLK_OFFSET), al2ahb_val);
#define SLPTYPE_CONTROL_EN
static void pm_write32(uint8_t reg, uint32_t value)
static uint8_t pm_read8(uint8_t reg)
static void pm_write16(uint8_t reg, uint16_t value)
static uint32_t misc_read32(uint8_t reg)
static uint32_t pm_read32(uint8_t reg)
static void misc_write32(uint8_t reg, uint32_t value)
static void pm_write8(uint8_t reg, uint8_t value)
#define ALINK_AHB_ADDRESS
static void write8(void *addr, uint8_t val)
static void write32(void *addr, uint32_t val)
static uint8_t read8(const void *addr)
const struct irq_idx_name * sb_get_apic_reg_association(size_t *size)
BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, set_pci_irqs, NULL)
void fch_init(void *chip_info)
void fch_final(void *chip_info)
#define GPP_CLK_REQ_MASK(clk_shift)
#define GPP_CLK_REQ_ON(clk_shift)
#define GPP_CLK5_REQ_SHIFT
#define GPP_CLK2_REQ_SHIFT
#define PM_ACPI_TIMER_EN_EN
#define FORCE_SLPSTATE_RETRY
#define PM_ACPI_GLOBAL_EN
#define GPP_CLK_OUTPUT_COUNT
#define PM_ACPI_DECODE_STD
#define GPP_CLK6_REQ_SHIFT
#define BP_X48M0_OUTPUT_EN
#define GPP_CLK1_REQ_SHIFT
#define PM_ACPI_RTC_EN_EN
#define GPP_CLK4_REQ_SHIFT
#define GPP_CLK0_REQ_SHIFT
#define GPP_CLK_REQ_EXT(clk_shift)
#define GPP_CLK_REQ_OFF(clk_shift)
#define GPP_CLK3_REQ_SHIFT
static void gpp_clk_setup(void)
static void sb_rfmux_config_override(void)
static void fch_init_acpi_ports(void)
static const struct irq_idx_name irq_association[]
static void fch_clk_output_48Mhz(void)
static void al2ahb_clock_gate(void)
static void set_pci_irqs(void *unused)
#define SMITYPE_SMI_CMD_PORT
void acpi_pm_gpe_add_events_print_events(void)
void gpio_add_events(void)
void write_pci_cfg_irqs(void)
void write_pci_int_table(void)
void populate_pirq_data(void)
void configure_smi(uint8_t smi_num, uint8_t mode)
#define USB_PD_PORT_COUNT
#define PD_PORT_MUX_OFFSET(x)
#define USB_PD_PORT_CONTROL
#define USB_PD_RFMUX_OVERRIDE
enum acp_config::@398 acp_pin_cfg
struct acp_config acp_config
struct usb_pd_control usb_pd_config_override[USB_PD_PORT_COUNT]
struct soc_amd_common_config common_config
bool acp_i2s_use_external_48mhz_osc
enum soc_amd_picasso_config::@419 gpp_clk_config[GPP_CLK_OUTPUT_COUNT]
uint8_t rfmux_override_en